I obtained this board off eBay. It also contained non-Intel EPROMS which make it more difficult to get operational. This board did contain a FORTH interpreter in the lower pair of ROMs. That was an interesting find.
I did plug this board into a chassis. It flashed a led in response to the reset button being pressed. There was no output on the serial port. No smoke, fire or overheating components. There was no damage to the board.
The hardware reference manual was shipped separately so it has not yet arrive here. I have not found a copy of the original Intel ROMs for this board. I suspect I will be porting a monitor to operate on this board. I believe the peripheral chips on this board and the 86/12 are addressed identically, so one ROM development should work with both. This also means I should be able to use the 86/12 ROMs on this board. We will see.
1513 MST 16 December 2011
I received the manual. I have preconfigured the board as well as I could based on the manual. This particular manual leaves a lot to be desired in reference to jumper settings. I will try and provide a table that handles this matter better. The complete reference manual is here. Just the schematic set for the iSBC 86/30 are here.
This board did not come with standard Intel monitor ROMs. I developed a monitor for it from the 8080 monitor I used on the iSBC 80/10 board. I programmed this monitor into two 2764 EPROMs. I put the ROMs in the board and attached it to the test card cage. I had built a probe for my HP-1650B Logic Analyzer for the 8086 processor. I had never used a logic analyzer in this fashon before, so I was unsure of what to expect it to produce. The logic analyzer produced a dump of the processor operation, state by state, until the processor abruptly halted. All the ROM work is here.
I am using an 8086 probe for the HP1650B to figure out what is wrong with this board. The probe is discussed on the 8086 Probe page under Test Equipment and Adapters on the Main page.
Analysis of the run showed the CPU was not reading all 5 bytes of the far jump located at FFFF:0. It turned out the group of tools I used to generate the minitor image failed to write the last bytes. Once I corrected that, and reprogrammed the ROMs, I got a run that showed the processor ran correctly until it attempted the first write to RAM. I have place the anotated trace for the initial operation of the 86/30 here.
The 8086 CPU requires a READY signal to complete any read or write, memory or I/O. If it fails to get this signal, it does a HALT. This is what happens when it tries to push the return address onto the stack in the first call statement at the start of the program.
I believe the failure of this board is in the current jumper settings. There are several hundred jumper pins on this board. The board contains 256K bytes of dynamic RAM. Intel began adding RAM to the CPU boards to allow faster RAM reads/writes than was possible with the multibus. Eventually, the iLBX standard was written to provide faster access to off board RAM via the P2 connector.
I will return to this board later. I am currently trying different disk drive on the iSBC 80/10.
1431 MST 6 January 2012
The board instrumented is shown here and here.
1841 MST 9 January 2012
After instrumenting this board, I messed with the jumpers to no avail. I started back tracing the signals to make the ready signal. When I got to the RAM address decoder, I found A12 (Actually A18 on the CPU) was always high. I traced the error to a 74S373 octal latch. The input was changing state, but nothing shows on the output. I will have to replace this chip on this 7-layer PCB very carefully. I always socket any chip I replace.
I will provide more once I have replaced the bad chip.
1929 MST 17 January 2012
I replace the bad IC. I powered the board back up and found A12 was still tied high. I pulled the RAM and ROM decoder PALs and found A12 worked as it should. This means U47 was ok and did NOT need to be replaced. I found that pin 8 of U45, the ROM decoder was the problem. I need a new ROM decoder PAL
I downloaded WinCUPL from the ATMEL web site. They issue serial numbers for this software, so I cannot place it on my site. I chose to replace the 14H4 PAL a 16V8 GAL. Intel provides either the logic or the JEDEC/HEX for all the PALs and PROMs on their boards in the Hadrware Reference Manual. I used the logic formulas from there for U45 to generate a JEDEC file for the replacement. I had to order some 16V8s so I am waiting for them to test.
1031 MST 21 January 2012